Micron Technology has not just filled in a capacity shortfall for more high bandwidth stacked DRAM to feed GPU and XPU ...

There is not one Ethernet business, but several, and now, with the evolution of Ethernet switches for back-end AI cluster ...

Right or wrong, we still believe that we live in a world where traditional HPC simulation and modeling at high precision ...

Given two endpoints and a compound annual growth rate between those two points over a specific amount of time is not as ...

It has been two and a half months since new chief executive officer Lip-Bu Tan gave the keynote at Intel’s Vision 2025 event, ...

Sitting in an office at QuEra Computing’s Boston headquarters, Yuval Boger was talking about the recent advancements made in quantum computing that are ...

Some heavy hitters like Intel, IBM, and Google along with a growing number of smaller startups for the past couple of decades ...

The shrink from 7 nanometer processes used in the Ampere GPU to the 4 nanometer processes used with the Hopper GPU allowed Nvidia to cram more compute units, cache, and I/O onto the die while at the ...

No question about it. Intel had to get a lot of moving pieces all meshing well to deliver the “Ice Lake” Xeon SP server processors, which came out earlier this month and which have actually been ...

Thanks For The Memory. We will take this step by step, because this is fun if you like system architecture. (And we do here at The Next Platform.). As we have pointed out before when talking about the ...